Invention Grant
- Patent Title: Wiring substrate
- Patent Title (中): 接线基板
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Application No.: US14032592Application Date: 2013-09-20
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Publication No.: US09232644B2Publication Date: 2016-01-05
- Inventor: Yuichiro Shimizu
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano-shi, Nagano
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano-shi, Nagano
- Agency: Drinker Biddle & Reath LLP
- Priority: JP2012-213601 20120927
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/03 ; H05K1/09 ; H05K1/02 ; H05K3/46 ; H05K3/00 ; H05K3/38 ; H05K3/40 ; H05K3/42

Abstract:
There is provided a wiring substrate. The wiring substrate includes: a first wiring layer; a first insulating layer on the first wiring layer; a first coupling agent layer on the first insulating layer; a first copper/tin alloy layer on the first coupling agent layer; a first via hole formed through the first copper/tin alloy layer, the first coupling agent layer, and the first insulating layer to reach the first wiring layer; a metal catalyst provided on only a sidewall of the first via hole; a seed layer provided on the metal catalyst and formed only on the sidewall of the first via hole; and a metal plating layer formed on the first copper/tin alloy layer and the seed layer and filled in the first via hole to contact the first wiring layer.
Public/Granted literature
- US20140083745A1 WIRING SUBSTRATE Public/Granted day:2014-03-27
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