Invention Grant
US09232665B2 Method of fabricating packaging substrate having a passive element embedded therein
有权
制造具有嵌入其中的无源元件的封装基板的方法
- Patent Title: Method of fabricating packaging substrate having a passive element embedded therein
- Patent Title (中): 制造具有嵌入其中的无源元件的封装基板的方法
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Application No.: US14457343Application Date: 2014-08-12
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Publication No.: US09232665B2Publication Date: 2016-01-05
- Inventor: Shih-Ping Hsu , Zhao-Chong Zeng
- Applicant: Unimicron Technology Corporation
- Applicant Address: TW Taoyuan
- Assignee: Unimicron Technology Corporation
- Current Assignee: Unimicron Technology Corporation
- Current Assignee Address: TW Taoyuan
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW099127018A 20100813
- Main IPC: H05K1/00
- IPC: H05K1/00 ; H05K3/46 ; H01L23/498 ; H01L23/50 ; H05K1/18 ; H05K3/40 ; H05K1/11 ; H05K3/00

Abstract:
A packaging substrate includes: a dielectric layer unit having top and bottom surfaces; a positioning pad embedded in the bottom surface of the dielectric layer unit; at least a passive element having a plurality of electrode pads disposed on upper and lower surfaces thereof, the passive element being embedded in the dielectric layer unit and corresponding to the positioning pad; a first circuit layer disposed on the top surface of the dielectric layer unit, the first circuit layer having first conductive vias electrically connected to the electrode pads disposed on the upper surface of the passive element; and a second circuit layer disposed on the bottom surface of the dielectric layer unit, the second circuit layer having second conductive vias electrically connected to the electrode pads disposed on the lower surface of the passive element. Through the embedding of the passive element, the overall structure may have a reduced height.
Public/Granted literature
- US20140345125A1 METHOD OF FABRICATING PACKAGING SUBSTRATE HAVING A PASSIVE ELEMENT EMBEDDED THEREIN Public/Granted day:2014-11-27
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