Invention Grant
US09244857B2 Systems and methods for implementing low-latency lookup circuits using multiple hash functions
有权
使用多个散列函数实现低延迟查找电路的系统和方法
- Patent Title: Systems and methods for implementing low-latency lookup circuits using multiple hash functions
- Patent Title (中): 使用多个散列函数实现低延迟查找电路的系统和方法
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Application No.: US14069253Application Date: 2013-10-31
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Publication No.: US09244857B2Publication Date: 2016-01-26
- Inventor: Guy L. Steele, Jr. , David R. Chase , Nils Gura
- Applicant: Oracle International Corporation
- Applicant Address: US CA Redwood City
- Assignee: Oracle International Corporation
- Current Assignee: Oracle International Corporation
- Current Assignee Address: US CA Redwood City
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Robert C. Kowert
- Main IPC: G06F12/10
- IPC: G06F12/10

Abstract:
A lookup circuit evaluates hash functions that map keys to addresses in lookup tables. The circuit may include multiple hash function sub-circuits, each of which applies a respective hash function to an input key value, producing a hash value. Each hash function sub-circuit (which may include a programmable hash table) may multiply bit vectors representing key values by a bit matrix and add a constant bit vector to the results. Each hash value may be used to access a location in a lookup table in memory to obtain its contents (e.g., a key and associated data). The circuit may include a selection sub-circuit that selects the data of one of the identified locations as an output of the lookup circuit (e.g., one whose key matches the input key). The circuit may modify obtained data prior to its selection and may output a signal indicating the validity of input keys.
Public/Granted literature
- US20150121034A1 Systems and Methods for Implementing Low-Latency Lookup Circuits Using Multiple Hash Functions Public/Granted day:2015-04-30
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