Invention Grant
- Patent Title: Orthogonal circuit element routing
- Patent Title (中): 正交电路元件路由
-
Application No.: US13908562Application Date: 2013-06-03
-
Publication No.: US09245076B2Publication Date: 2016-01-26
- Inventor: Vassilios Gerousis , Lars W. Liebmann , Stefanus Mantik , Gustavo E. Tellez , Shuo Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Steven J. Meyers
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Various embodiments include computer-implemented methods, computer program products and systems for aligning a set of orthogonal circuit elements in an integrated circuit (IC) layout. In some embodiments, a computer-implemented method for aligning a set of orthogonal circuit elements in an IC layout includes: classifying each orthogonal circuit element in the set of orthogonal circuit elements as including a first space-designated edge and a second space-designated edge; and aligning each orthogonal circuit element on an edge placement grid according to the first space-designated edge and the second space-designated edge, the edge placement grid having a first set of space-designated grid lines separated by a first distance, and a second set of space-designated grid lines separated by a second distance, wherein the first set of space-designated grid lines is separated from the second set of space-designated grid lines by an offset distance.
Public/Granted literature
- US20140359548A1 ORTHOGONAL CIRCUIT ELEMENT ROUTING Public/Granted day:2014-12-04
Information query