Invention Grant
- Patent Title: Non-volatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13595478Application Date: 2012-08-27
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Publication No.: US09245628B2Publication Date: 2016-01-26
- Inventor: Hiroshi Maejima
- Applicant: Hiroshi Maejima
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-221500 20111006
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C16/26

Abstract:
A non-volatile semiconductor memory device includes a semiconductor layer of a first conductivity type, and a plurality of wells of a second conductivity type formed on the first semiconductor layer, the wells being arranged in a first direction. A memory block is arranged in each well. A plurality of word lines are provided, each word line being commonly connected to a plurality of NAND cell units in one memory block. A plurality of bit lines extend in a first direction, the bit lines being connected to first ends of the NAND cell units present in the memory blocks. A source line is connected to second ends of the NAND cell units. A well driver performs a control of selectively providing a first voltage or a second voltage higher than the first voltage to each well.
Public/Granted literature
- US20130088918A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-04-11
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