Invention Grant
- Patent Title: Method of fabricating three-dimensional semiconductor device
- Patent Title (中): 制造三维半导体器件的方法
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Application No.: US14536328Application Date: 2014-11-07
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Publication No.: US09245902B2Publication Date: 2016-01-26
- Inventor: Kil-Su Jeong
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2011-0090544 20110907
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/336 ; H01L27/115 ; H01L27/06 ; H01L27/10 ; H01L29/792

Abstract:
A three-dimensional semiconductor device and a method of fabricating the same, the device including a lower insulating layer on a top surface of a substrate; an electrode structure sequentially stacked on the lower insulating layer, the electrode structure including conductive patterns; a semiconductor pattern penetrating the electrode structure and the lower insulating layer and being connected to the substrate; and a vertical insulating layer interposed between the semiconductor pattern and the electrode structure, the vertical insulating layer crossing the conductive patterns in a vertical direction and being in contact with a top surface of the lower insulating layer.
Public/Granted literature
- US20150064867A1 METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE Public/Granted day:2015-03-05
Information query
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