An electrostatic discharge (ESD) protection circuit and a display device comprising the protection circuit are provided. The protection circuit comprises a first depletion mode thin-film transistor, a second depletion mode thin-film transistor, a third depletion mode thin-film transistor, and a voltage dividing unit. This, when in normal operation, effectively prevents a signal line from releasing a large amounts of current, ensures that an internal array of the display device operates normally, and when an ESD occurs, allows for rapid discharge of an electrostatic charge accumulated on the signal line and ensures that the internal array of the display device is free from the electrostatic damage. Hence, application of the ESD protection circuit allows for utilization of low-cost depletion mode thin-film transistors to implement of electrostatic discharge and for reduced the manufacturing cost of the ESD protection circuit, thus reducing the manufacturing costs of the display device comprising the protection circuit.