The present application suggests an electronic device and method for generating clock signals with and without frequency jitter for one source clock signal generated by a single narrow-band source clock signal. The device comprises a random number generator to generate a random number signal varying in time which represents a divisor fraction signal; a signal mixer to mix the timely varying random number signal and a clock divisor signal and to output a mixed divisor signal; and a fractional clock divider to generate an output clock signal from a source clock signal, wherein the output clock signal has a frequency fout(t), which is substantially equal to the frequency fsource of the source clock signal being a narrow-band clock signal divided by a divisor D(t) represented by the mixed divisor signal.