Invention Grant
US09246515B2 Error correction code block having dual-syndrome generator, method thereof, and system having same
有权
纠错码块，具有双重认证发生器，其方法和具有该纠错码的系统
- Patent Title: Error correction code block having dual-syndrome generator, method thereof, and system having same
- Patent Title (中): 纠错码块，具有双重认证发生器，其方法和具有该纠错码的系统
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Application No.: US13340818Application Date: 2011-12-30
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Publication No.: US09246515B2Publication Date: 2016-01-26
- Inventor: Jae Phil Kong , Seok-Won Ahn
- Applicant: Jae Phil Kong , Seok-Won Ahn
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H03M13/15 ; G06F11/10
Abstract:
An error correction code block including dual-syndrome generators, which may process a plurality of successive code word without latency, is configured to calculate syndrome values of a corresponding even numbered codeword among the plurality of code words by using one of the dual-syndrome generators, and is configured to calculate syndrome values of a corresponding odd numbered codeword among the plurality of code words by using the other of the dual-syndrome generators.
Public/Granted literature
- US20120173951A1 ERROR CORRECTION CODE BLOCK HAVING DUAL-SYNDROME GENERATOR, METHOD THEREOF, AND SYSTEM HAVING SAME Public/Granted day:2012-07-05
Information query
IPC分类:
