Invention Grant
US09250292B2 Testing system for testing semiconductor package stacking chips and semiconductor automatic tester thereof 有权
半导体封装堆垛芯片测试系统及其半导体自动测试仪

  • Patent Title: Testing system for testing semiconductor package stacking chips and semiconductor automatic tester thereof
  • Patent Title (中): 半导体封装堆垛芯片测试系统及其半导体自动测试仪
  • Application No.: US13854372
    Application Date: 2013-04-01
  • Publication No.: US09250292B2
    Publication Date: 2016-02-02
  • Inventor: Chien-Ming Chen
  • Applicant: CHROMA ATE INC.
  • Applicant Address: TW Taoyuan County
  • Assignee: CHROMA ATE INC.
  • Current Assignee: CHROMA ATE INC.
  • Current Assignee Address: TW Taoyuan County
  • Agency: Locke Lord LLP
  • Agent Tim Tingkang Xia, Esq.
  • Priority: TW101115834A 20120503
  • Main IPC: G01R31/28
  • IPC: G01R31/28
Testing system for testing semiconductor package stacking chips and semiconductor automatic tester thereof
Abstract:
A testing system for testing semiconductor package stacking chips is disclosed. The system includes a testing socket, a testing arm, and a testing mechanism. The testing mechanism includes a probe testing device. The probe testing device has a testing chip inside and a plurality of testing probes electrically connected to the testing chip. The plurality of testing probes extends toward the testing socket for contacting a chip-under-test loaded on the testing socket. When the testing mechanism moves to an upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop.
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