Invention Grant
US09251079B2 Managing processor thread access to cache memory using lock attributes 有权
使用锁属性管理处理器线程访问缓存内存

Managing processor thread access to cache memory using lock attributes
Abstract:
A cache memory device includes a plurality of cache areas, each the cache area comprising a plurality of entries. The cache memory device is configured to maintain a separate lock attribute for each the cache area and temporarily assign possession of a lock attribute for a particular the cache area to a processor thread attempting to update the particular the cache area, the processor thread being unable to update the particular the cache area without possession of the lock attribute for the particular the cache area.
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