Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14233280Application Date: 2012-12-07
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Publication No.: US09252059B2Publication Date: 2016-02-02
- Inventor: Qiuxia Xu , Gaobo Xu , Huajie Zhou , Huilong Zhu , Dapeng Chen
- Applicant: Institute of Microelectronics, Chinese Academy of Sciences
- Applicant Address: CN
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN
- Agency: Schwegman Lundberg & Woessner, P.A.
- Priority: CN201210507230 20121130
- International Application: PCT/CN2012/086132 WO 20121207
- International Announcement: WO2014/082338 WO 20140605
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/49 ; H01L21/28 ; H01L21/285 ; H01L21/265 ; H01L21/268 ; H01L21/3213 ; H01L21/324 ; H01L29/423 ; H01L29/10 ; H01L29/66 ; H01L21/02 ; H01L29/51

Abstract:
A method for manufacturing a semiconductor device that comprises two opposite types of MOSFETs formed on one semiconductor substrate, comprising: defining an active region for each of the MOSFETs on the semiconductor substrate; forming an interfacial oxide layer on a surface of the semiconductor substrate; forming a high-K gate dielectric layer on the interfacial oxide layer; forming a metal gate layer on the high-K gate dielectric layer; implanting dopant ions in the metal gate layer; forming a Poly-Si layer on the metal gate layer; patterning the Poly-Si layer, the metal gate layer, the high-K gate dielectric layer and the interfacial oxide layer to form a plurality of gate stack structures; forming a plurality of gate spacer surrounding each of the plurality of gate stack structures; and forming a plurality of S/D regions. During activation annealing for forming the S/D regions, the dopant ions implanted in the metal gate layer diffuse and accumulate at an upper interface of the high-K gate dielectric layer to change the characteristics of the metal gates, and at a lower interface of the high-K gate dielectric layer to form electric dipoles with appropriate polarities by interfacial reaction, so as to realize adjusting of the effective work functions of the metal gates of the opposite types of MOSFETs, respectively.
Public/Granted literature
- US20150262887A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2015-09-17
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