Invention Grant
US09252229B2 Inversion thickness reduction in high-k gate stacks formed by replacement gate processes
有权
通过替换栅极工艺形成的高k栅极叠层的反向厚度减小
- Patent Title: Inversion thickness reduction in high-k gate stacks formed by replacement gate processes
- Patent Title (中): 通过替换栅极工艺形成的高k栅极叠层的反向厚度减小
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Application No.: US13605267Application Date: 2012-09-06
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Publication No.: US09252229B2Publication Date: 2016-02-02
- Inventor: Takashi Ando , Vijay Narayanan
- Applicant: Takashi Ando , Vijay Narayanan
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/49 ; H01L21/28 ; H01L29/51 ; H01L29/66 ; H01L29/78

Abstract:
A method of forming a transistor device includes forming an interfacial layer on a semiconductor substrate, corresponding to a region between formed doped source and drain regions in the substrate; forming a high dielectric constant (high-k) layer on the interfacial layer, the high-k layer having a dielectric constant greater than about 7.5; forming a doped metal layer on the high-k layer; performing a thermal process so as to cause the doped metal layer to scavenge oxygen atoms diffused from the interfacial layer such that a final thickness of the interfacial layer is less than about 5 angstroms (Å); and forming a metal gate material over the high-k dielectric layer.
Public/Granted literature
- US20120326245A1 INVERSION THICKNESS REDUCTION IN HIGH-K GATE STACKS FORMED BY REPLACEMENT GATE PROCESSES Public/Granted day:2012-12-27
Information query
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