Invention Grant
- Patent Title: Semiconductor memory device and method of manufacturing the same
- Patent Title (中): 半导体存储器件及其制造方法
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Application No.: US13767029Application Date: 2013-02-14
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Publication No.: US09252358B2Publication Date: 2016-02-02
- Inventor: Hiroshi Kanno , Takayuki Tsukamoto , Hiroyuki Fukumizu , Yoichi Minemura , Takamasa Okawa
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L21/332
- IPC: H01L21/332 ; H01L29/06 ; H01L45/00 ; H01L27/24
Abstract:
First, a trench penetrating first conductive layers and interlayer insulating layers is formed. Next, a column-shaped conductive layer is formed to fill the trench via a side wall layer. Then, after formation of the side wall layer, by migration of oxygen atoms between the side wall layer and the first conductive layers or migration of oxygen atoms between the side wall layer and the interlayer insulating layers, a proportion of oxygen atoms in the side wall layer adjacent to the interlayer insulating layers is made larger than a proportion of oxygen atoms in the side wall layer adjacent to the first conductive layers, whereby the side wall layer adjacent to the first conductive layers is caused to function as the variable resistance element.
Public/Granted literature
- US20140061577A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2014-03-06
Information query
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