Invention Grant
US09252928B2 Ultra-wideband loss of signal detector at a receiver in a high speed serializer/deserializer (SERDES) application
有权
在高速串行器/解串器（SERDES）应用中的接收器处的信号检测器的超宽带损耗
- Patent Title: Ultra-wideband loss of signal detector at a receiver in a high speed serializer/deserializer (SERDES) application
- Patent Title (中): 在高速串行器/解串器（SERDES）应用中的接收器处的信号检测器的超宽带损耗
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Application No.: US13775501Application Date: 2013-02-25
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Publication No.: US09252928B2Publication Date: 2016-02-02
- Inventor: Sanyi Zhan , Tainwei Liu , Erzhu Chen
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Priority: CN201310007189 20130109
- Main IPC: H04B1/00
- IPC: H04B1/00 ; H04L1/20 ; G06F11/10
Abstract:
An apparatus comprising a first loss of signal circuit, a second loss of a signal circuit and a gate circuit. The first loss of a signal circuit may be configured to (i) receive an input signal containing a series of data and (ii) generate a first indication signal when the input signal is operating within a first frequency range. The second loss of signal circuit may be configured to (i) receive the input signal and (ii) generate a second indication signal when the input signal is operating within a second frequency range. The gate circuit may be configured to generate an output signal in response to either the first indication signal or the second indication signal being active.
Public/Granted literature
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