Invention Grant
US09256246B1 Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs)
有权
三维(3D)集成电路(IC)(3DIC)中的自适应主体偏置的时钟偏移补偿
- Patent Title: Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs)
- Patent Title (中): 三维(3D)集成电路(IC)(3DIC)中的自适应主体偏置的时钟偏移补偿
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Application No.: US14608462Application Date: 2015-01-29
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Publication No.: US09256246B1Publication Date: 2016-02-09
- Inventor: Sung Kyu Lim , Yang Du
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Withrow & Terranova, PLLC
- Main IPC: H03H11/26
- IPC: H03H11/26 ; H03K5/12 ; G06F1/10 ; H03K5/135 ; H03K5/00

Abstract:
Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs) is disclosed. In one aspect, a sensor is placed on each tier of a 3DIC to evaluate a speed characteristic of each tier relative to the speed characteristic of another tier. Based on determining the relative speed characteristics, a control signal may be provided to adjust back body bias elements for clock buffers. Adjusting the back body bias effectively adjusts a threshold voltage of the clock buffers. Adjusting the threshold voltage of the clock buffers has the effect of slowing down or speeding up the clock buffers. For example, slow clock buffers may be sped up by providing a forward body bias and fast clock buffers may be slowed down by providing a reverse body bias. By speeding up slow elements and slowing down fast elements, compensation for the relative speed characteristics may be provided.
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