Invention Grant
- Patent Title: Level placement in solid-state memory
- Patent Title (中): 固态存储器中的电平放置
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Application No.: US14699596Application Date: 2015-04-29
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Publication No.: US09256375B2Publication Date: 2016-02-09
- Inventor: Nikolaos Papandreou , Charalampos Pozidis
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Jennifer R. Davis
- Priority: GB1215339.1 20120829
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F3/06

Abstract:
Methods and apparatus are provided for determining level placement in q-level cells of solid-state memory, where q>2. A group cells is read, where each cell is programmed to a respective programming level, at a series of time instants to obtain a sequence of read metric values for that cell. Statistical data as a function of time for each level is derived by processing the sequence of read metric values for the group of cells. At least one parameter of a model defining variation with time of the statistical data is determined. Calculating a set of q programming levels which has a pre-determined property over time based on a variation of the parameter as a function of level and the model.
Public/Granted literature
- US20150234613A1 LEVEL PLACEMENT IN SOLID-STATE MEMORY Public/Granted day:2015-08-20
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