Invention Grant
- Patent Title: RAM memory device capable of simultaneously accepting multiple accesses
- Patent Title (中): RAM存储器能够同时接受多次访问
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Application No.: US13653141Application Date: 2012-10-16
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Publication No.: US09256556B2Publication Date: 2016-02-09
- Inventor: Tomoyuki Maeda
- Applicant: Tomoyuki Maeda
- Applicant Address: JP Yokohama
- Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee Address: JP Yokohama
- Agency: Studebaker & Brackett PC
- Priority: JP2011-231550 20111021
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/16 ; G06F12/08 ; G06F3/06 ; G06F12/06
Abstract:
A RAM memory device includes a selection unit that supplies the access reaching one of two interfaces to a RAM in one cycle of a clock signal in response to a control signal. The RAM memory device also includes a storage unit that stores another access that has reached the other of the two interfaces at least till the next cycle following the above-mentioned one cycle in response to the control signal. The selection unit supplies the above-mentioned another access from the storage unit to the RAM in or after the above-mentioned next cycle.
Public/Granted literature
- US20130104004A1 RAM MEMORY DEVICE Public/Granted day:2013-04-25
Information query
