Invention Grant
US09257329B2 Methods for fabricating integrated circuits including densifying interlevel dielectric layers
有权
用于制造集成电路的方法，包括致密化的层间电介质层
- Patent Title: Methods for fabricating integrated circuits including densifying interlevel dielectric layers
- Patent Title (中): 用于制造集成电路的方法，包括致密化的层间电介质层
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Application No.: US14185398Application Date: 2014-02-20
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Publication No.: US09257329B2Publication Date: 2016-02-09
- Inventor: Oliver Mieth , Carsten Peters , Torsten Huisinga
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L21/768
Abstract:
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes densifying an upper-surface portion of an ILD layer of dielectric material that overlies a metallization layer above a semiconductor substrate to form a densified surface layer of dielectric material. The densified surface layer and the ILD layer are etched through to expose a metal line of the metallization layer.
Public/Granted literature
- US20150235896A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS Public/Granted day:2015-08-20
Information query
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