Invention Grant
US09257518B2 Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuit
有权
用于制造金属栅极MOS晶体管，特别是PMOS晶体管的方法和相应的集成电路
- Patent Title: Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuit
- Patent Title (中): 用于制造金属栅极MOS晶体管，特别是PMOS晶体管的方法和相应的集成电路
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Application No.: US14254994Application Date: 2014-04-17
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Publication No.: US09257518B2Publication Date: 2016-02-09
- Inventor: Sylvain Baudot , Pierre Caubet , Florian Domengie
- Applicant: STMicroelectronics (Crolles 2) SAS
- Applicant Address: FR Crolles
- Assignee: STMicrolectronics (Crolles 2) SAS
- Current Assignee: STMicrolectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1353728 20130424
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/423 ; H01L27/088 ; H01L21/8234 ; H01L21/28 ; H01L29/49 ; H01L29/78
Abstract:
At least one MOS transistor is produced by forming a dielectric region above a substrate and forming a gate over the dielectric region. The gate is formed to include a metal gate region. Formation of the metal gate region includes: forming a layer of a first material configured to reduce an absolute value of a threshold voltage of the transistor, and configuring a part of the metal gate region so as also to form a diffusion barrier above the layer of the first material. Then, doped source and drain regions are formed using a dopant activation anneal.
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