Adiabatic logic circuit having a first and a second inputs, a first and a second outputs and at least one supply and synchronization input (Phi), with this circuit comprising: a first logic device comprising at least one first microelectromechanical and/or nanoelectromechanical switch, referred to as first mechanical switch, controlled by a first input and connected to the first output and to the supply and synchronization input, a second logic device opposite the first logic device comprising at least one second microelectromechanical or nanoelectromechanical switch, referred to as second mechanical switch, controlled by the second input and connected to the second output and to the supply and synchronization input, first and second devices for partial discharging connected respectively between the first output and the supply and synchronization input and between the second output and the supply and synchronization input.