Disclosed herein is an apparatus that includes: a first terminal configured to receive a serial write data signal that includes at least four bits transferred in series with each other; a second terminal configured to receive a data strobe signal; a control circuit configured to produce a plurality of internal data strobe signals in response to the data strobe signal; and a serial-to-parallel conversion circuit configured to respond to the data strobe and internal data strobe signals to convert the serial write data signal into a parallel write data signal that includes at least four bits produced in parallel to each other.