Invention Grant
- Patent Title: Method of fabricating a gate dielectric layer
- Patent Title (中): 制造栅极电介质层的方法
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Application No.: US14585802Application Date: 2014-12-30
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Publication No.: US09263546B2Publication Date: 2016-02-16
- Inventor: Wei-Yang Lee , Xiong-Fei Yu , Da-Yuan Lee , Kuang-Yuan Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Hauptman Ham, LLP
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/10 ; H01L29/66 ; H01L29/423 ; H01L21/8238 ; H01L21/28 ; H01L29/51

Abstract:
A method of making a semiconductor device, the method includes forming an active region in a substrate. The method further includes forming a first gate structure over the active region, where the forming the first gate structure includes forming a first interfacial layer. An entirety of a top surface of the first interfacial layer is a curved convex surface. Furthermore, the method includes forming a first high-k dielectric over the first interfacial layer. Additionally, the method includes forming a first gate electrode over a first portion of the first high-k dielectric and surrounded by a second portion of the first high-k dielectric.
Public/Granted literature
- US20150140765A1 METHOD OF FABRICATING A GATE DIELECTRIC LAYER Public/Granted day:2015-05-21
Information query
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