Invention Grant
- Patent Title: Misalignment correction for embedded microelectronic die applications
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Application No.: US13738708Application Date: 2013-01-10
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Publication No.: US09266723B2Publication Date: 2016-02-23
- Inventor: Grant A. Crawford , Islam Salama
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Winkle, PLLC
- Main IPC: B81C1/00
- IPC: B81C1/00 ; H01L21/683 ; H01L23/538 ; H01L23/31 ; H01L23/544 ; H01L23/00

Abstract:
The present disclosure relates to the field of integrated circuit packaging and, more particularly, to packages using embedded microelectronic die applications, such a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of alignment correction of microelectronic dice within the bumpless build-up layer packages. This alignment correction may comprise characterizing the misalignment of each microelectronic die mounted on a carrier and forwarding this characterization, along with data regarding the orientation of the carrier, to processing equipment that can compensate for the misalignment of each microelectronic die.
Public/Granted literature
- US20130119046A1 MISALIGNMENT CORRECTION FOR EMBEDDED MICROELECTRONIC DIE APPLICATIONS Public/Granted day:2013-05-16
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