Invention Grant
- Patent Title: Methods for bypassing faulty connections
- Patent Title (中): 绕过故障连接的方法
-
Application No.: US14308122Application Date: 2014-06-18
-
Publication No.: US09270506B2Publication Date: 2016-02-23
- Inventor: Timothy M. Hollis
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H04L25/49
- IPC: H04L25/49 ; H04L1/22 ; G11C5/02 ; H01L21/66 ; H01L25/065 ; H04L25/02 ; H04L27/02 ; G06F11/20 ; H01L23/48

Abstract:
Apparatus are disclosed, such as those involving a 3-D integrated circuit. One such apparatus includes a first die including a plurality of vertical connectors formed therethrough. The apparatus also includes a first circuit configured to encode multiple data bits into a multi-bit symbol, and provide the multi-bit symbol to two or more of the vertical connectors. The apparatus further includes a second circuit configured to receive the multi-bit symbol from at least one of the two or more vertical connectors, and decode the multi-bit symbol into the multiple data bits. The apparatus provides enhanced repairability with no or less redundant vertical connectors, thus avoiding the need for “on the fly” or field repair of defective vertical connectors.
Public/Granted literature
- US20140301499A1 METHODS FOR BYPASSING FAULTY CONNECTIONS Public/Granted day:2014-10-09
Information query