Invention Grant
US09274961B2 Method for building multi-processor system with nodes having multiple cache coherency domains
有权
用于构建具有多个高速缓存一致性域的节点的多处理器系统的方法
- Patent Title: Method for building multi-processor system with nodes having multiple cache coherency domains
- Patent Title (中): 用于构建具有多个高速缓存一致性域的节点的多处理器系统的方法
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Application No.: US14534842Application Date: 2014-11-06
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Publication No.: US09274961B2Publication Date: 2016-03-01
- Inventor: Endong Wang , Leijun Hu , Jicheng Chen , Dong Zhang , Weifeng Gong , Feng Zhang
- Applicant: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
- Applicant Address: CN Jinan
- Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
- Current Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
- Current Assignee Address: CN Jinan
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: CN201210544976 20121217
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F15/173
Abstract:
A method for building a multi-processor system with nodes having multiple cache coherency domains. In this system, a directory built in a node controller needs to include processor domain attribute information, and the information can be acquired by configuring cache coherency domain attributes of ports of the node controller connected to processors. In the disclosure herein, the node controller can support the multiple physical cache coherency domains in a node.
Public/Granted literature
- US20150067269A1 METHOD FOR BUILDING MULTI-PROCESSOR SYSTEM WITH NODES HAVING MULTIPLE CACHE COHERENCY DOMAINS Public/Granted day:2015-03-05
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