Invention Grant
- Patent Title: Semiconductor integrated circuit device and process for manufacturing the same
- Patent Title (中): 半导体集成电路器件及其制造方法
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Application No.: US14739818Application Date: 2015-06-15
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Publication No.: US09275956B2Publication Date: 2016-03-01
- Inventor: Hiroyuki Uchiyama , Hiraku Chakihara , Teruhisa Ichise , Michimoto Kaminaga
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent Gregory E. Montone
- Priority: JP11-345429 19991203
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L23/58 ; G03F9/00 ; H01L21/3105 ; H01L21/762 ; H01L21/768 ; H01L21/66 ; H01L21/306 ; H01L21/78 ; H01L27/02 ; H01L29/78
Abstract:
A semiconductor substrate includes scribe and product regions, with grooves formed in the scribe region. The grooves are embedded with an insulating film to provide an isolation region, and an active region, including semiconductor elements, is formed in the product region. Dummy patterns are formed in the scribe region, which include a first dummy pattern and second dummy patterns for preventing dishing of the insulating film. The second dummy patterns are surrounded and defined by the isolation region. A target pattern for optical pattern recognition is arranged over the first dummy pattern, and includes a first conductive film. A plane area of the first dummy pattern is larger than a plane area of each of the second dummy patterns, and the first dummy pattern and the second dummy patterns are arranged in order from an edge of the semiconductor substrate toward the product region.
Public/Granted literature
- US20150279788A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME Public/Granted day:2015-10-01
Information query
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