Invention Grant
- Patent Title: Printed wiring board
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Application No.: US14232595Application Date: 2012-07-19
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Publication No.: US09277646B2Publication Date: 2016-03-01
- Inventor: Hiroaki Kato , Kiyotaka Komori
- Applicant: Hiroaki Kato , Kiyotaka Komori
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2011-159279 20110720
- International Application: PCT/JP2012/068394 WO 20120719
- International Announcement: WO2013/012053 WO 20130124
- Main IPC: H05K1/03
- IPC: H05K1/03 ; H05K1/02

Abstract:
An object of the present invention is to provide a printed wiring board which does not require arranging signal lines oblique to the warp or weft threads constituting a substrate and is capable of reducing a difference in transmission rates between the signal lines. The present invention relates to a printed wiring board including: an insulating layer; and a signal layer including a set of at least two signal lines and disposed on one side of the insulating layer. A substrate is embedded inside the insulating layer in such a manner to be further from the signal layer than a center of the insulating layer in a thickness direction of the insulating layer is. The insulating layer has a laminated structure of a thick layer, the substrate, and a thin layer. A ratio of a thickness of the thick layer to a thickness of the thin layer is greater than five.
Public/Granted literature
- US09307636B2 Printed wiring board Public/Granted day:2016-04-05
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