A wiring board includes a core substrate having a number of through-holes, and buildup insulating layers and buildup wiring layers alternately laminated on upper and lower surfaces of the core substrate, in which a first through-hole group is arranged in a first region in the core board at a first arrangement density, the first region being opposed to the semiconductor element connection pad formation region, a second through-hole group is arranged in a second region at a second arrangement density lower than the first arrangement density, the second region being located in an outer peripheral portion of the core substrate and away from the first region, and a third through-hole group is arranged in a third region at a third arrangement density higher than the second arrangement density, the third region being located between the first region and the second region.