Invention Grant
- Patent Title: Method for data accessing and memory writing for logic analyzer
- Patent Title (中): 逻辑分析仪的数据访问和存储器写入方法
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Application No.: US13761561Application Date: 2013-02-07
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Publication No.: US09280291B2Publication Date: 2016-03-08
- Inventor: Chiu-Hao Cheng
- Applicant: ZEROPLUS TECHNOLOGY CO., LTD.
- Applicant Address: TW New Taipei
- Assignee: ZEROPLUS TECHNOLOGY CO., LTD.
- Current Assignee: ZEROPLUS TECHNOLOGY CO., LTD.
- Current Assignee Address: TW New Taipei
- Agency: Sinorica, LLC
- Agent Ming Chow
- Priority: TW101104958A 20120215
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G01R31/3177 ; G11C29/56 ; G01R31/3183

Abstract:
A method of fetching digital data and writing the digital data into a memory of a logic analyzer, which comprises the steps: designate at least a first region and a second region in a memory; set a first triggering condition and a second triggering condition; fetch digital data continuously and write it into the memory while analyzing; and then write first test data which have an identification to satisfy the first triggering condition into the first region, and write second test data which have an identification to satisfy the second triggering condition into the second region. And once the first test data or the second test data are found, stop writing the digital data into the corresponding regions.
Public/Granted literature
- US20130212346A1 Method for Data Accessing and Memory Writing for Logic Analyzer Public/Granted day:2013-08-15
Information query