Patterning method for semiconductor device fabrication

Invention Grant

US09281193B2 Patterning method for semiconductor device fabrication 有权

Title translation: 半导体器件制造的图案化方法

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Patent Title: Patterning method for semiconductor device fabrication
Patent Title (中): 半导体器件制造的图案化方法
Application No.: US14729262

Application Date: 2015-06-03
Publication No.: US09281193B2

Publication Date: 2016-03-08
Inventor: Yen-Chun Huang , Chih-Ming Lai , Ken-Hsien Hsieh , Ming-Feng Shieh
Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
Applicant Address: TW Hsin-Chu
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee Address: TW Hsin-Chu
Agency: Haynes and Boone, LLP
Main IPC: H01L21/308
IPC: H01L21/308 ; H01L21/033 ; H01L21/311 ; H01L21/768 ; H01L21/32 ; H01L21/3213 ; H01L23/532

Patterning method for semiconductor device fabrication

Abstract:

A method includes forming a first pattern having a first feature of a first material on a semiconductor substrate. A second pattern with a second feature and third feature of a second material, interposed by the first feature, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the first feature, the second feature, and the third feature. After forming the spacer elements, the second material comprising the second and third features is selectively removed to form a first opening and a second opening. The first feature, the first opening and the second opening are used as a masking element to etch the target layer.

Abstract(Chinese):

一种方法包括在半导体衬底上形成具有第一材料的第一特征的第一图案。具有由第一特征插入的第二材料的第二特征和第三特征的第二图案形成在半导体衬底上。间隔元件然后形成在第一特征，第二特征和第三特征的侧壁上。在形成间隔元件之后，选择性地移除包括第二和第三特征的第二材料以形成第一开口和第二开口。第一特征，第一开口和第二开口用作掩模元件以蚀刻目标层。

Public/Granted literature

US20150270129A1 PATTERNING METHOD FOR SEMICONDUCTOR DEVICE FABRICATION Public/Granted day:2015-09-24

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IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/302	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/306	......化学或电处理，例如电解腐蚀（形成绝缘层的入H01L21/31；绝缘层的后处理入H01L21/3105）
H01L21/308	.......应用掩膜的（H01L21/3063，H01L21/3065优先）