Invention Grant
- Patent Title: Transistor having reduced channel length
- Patent Title (中): 晶体管具有减小的通道长度
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Application No.: US13632761Application Date: 2012-10-01
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Publication No.: US09281237B2Publication Date: 2016-03-08
- Inventor: Shunpei Yamazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JP2011-225524 20111013
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L21/768 ; H01L27/108 ; H01L27/115 ; H01L27/12 ; H01L21/74 ; H01L29/417
Abstract:
A transistor which includes an oxide semiconductor and can operate at high speed is provided. A highly reliable semiconductor device including the transistor is provided. An oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer formed in a groove of a base insulating layer. The channel formation region is embedded in a position overlapping with a gate electrode which has a side surface provided with a sidewall. The groove includes a deep region and a shallow region. The sidewall overlaps with the shallow region, and a connection portion between a wiring and the electrode layer overlaps with the deep region.
Public/Granted literature
- US20130092926A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2013-04-18
Information query
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