Invention Grant
- Patent Title: Chip scale module package in BGA semiconductor package
- Patent Title (中): 芯片尺寸模块封装采用BGA半导体封装
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Application No.: US12882728Application Date: 2010-09-15
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Publication No.: US09281300B2Publication Date: 2016-03-08
- Inventor: Leo A. Merilo , Emmanuel A. Espiritu , Dario S. Filoteo, Jr. , Rachel L. Abinan
- Applicant: Leo A. Merilo , Emmanuel A. Espiritu , Dario S. Filoteo, Jr. , Rachel L. Abinan
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L25/16 ; H01L23/00 ; H01L23/31 ; H01L25/065

Abstract:
A semiconductor package includes a ball grid array (BGA) substrate having integrated metal layer circuitry, a flip chip chip scale module package (CSMP) having a first integrated passive device (IPD), the flip chip chip scale module package attached to the BGA substrate, and an application die attached to the IPD. A method of manufacturing a semiconductor package includes providing a BGA substrate having integrated metal layer circuitry, attaching a flip chip CSMP having a first IPD to the BGA substrate, and attaching an application die to the IPD.
Public/Granted literature
- US20110001240A1 Chip Scale Module Package in BGA Semiconductor Package Public/Granted day:2011-01-06
Information query
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