Invention Grant
- Patent Title: Digital filter circuit and digital filter control method
- Patent Title (中): 数字滤波电路和数字滤波器控制方法
-
Application No.: US13993883Application Date: 2011-08-18
-
Publication No.: US09281801B2Publication Date: 2016-03-08
- Inventor: Atsufumi Shibayama
- Applicant: Atsufumi Shibayama
- Applicant Address: JP Tokyo
- Assignee: NEC CORPORATION
- Current Assignee: NEC CORPORATION
- Current Assignee Address: JP Tokyo
- Priority: JP2010-284137 20101221
- International Application: PCT/JP2011/069098 WO 20110818
- International Announcement: WO2012/086262 WO 20120628
- Main IPC: H03H17/02
- IPC: H03H17/02

Abstract:
A digital filter circuit and a digital filter control method are capable of reducing circuit scale and power consumption for filter processing in a frequency domain such as an overlap FDE method. The digital filter circuit according to the present invention includes: an overlap addition unit for giving an overlap of M data (M is a positive integer) between the block and the previous block; an FFT processing unit for transforming the generated block by FFT processing; a filter computation unit for performing filter processing to the transformed block; an IFFT unit for transforming the block, which the filter processing was performed to, by IFFT processing; an overlap removal unit for removing M units of data from both ends of the transformed block; and a clock generation unit for setting the frequency of a filter processing clock signal based on a value of M, wherein the filter processing clock signal drives the data output unit of the overlap addition unit, the FFT unit, the filter computation unit, the IFFT unit, and the input unit of the overlap removal unit.
Public/Granted literature
- US20130262545A1 DIGITAL FILTER CIRCUIT AND DIGITAL FILTER CONTROL METHOD Public/Granted day:2013-10-03
Information query