Invention Grant
- Patent Title: Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit
- Patent Title (中): 主从触发器和在集成电路中实现主从触发器的方法
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Application No.: US14299196Application Date: 2014-06-09
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Publication No.: US09281807B1Publication Date: 2016-03-08
- Inventor: Pierre Maillard , Praful Jain , Michael J. Hart , Sundeep Ram Gopal Agarwal , Austin H. Lesea , Jun Liu
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent John J. King; Frederick Hsu
- Main IPC: H03K3/023
- IPC: H03K3/023 ; H03K3/037
Abstract:
A master-slave flip-flop implemented in an integrated circuit comprises a master latch coupled to receive data at an input; and a slave latch coupled to an output of the master latch, wherein the slave latch comprises an SEU-enhanced latch, and the master latch is not enhanced for SEU protection. A method of implementing a master-slave flip-flop in an integrated circuit is also described.
Information query
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