Invention Grant
- Patent Title: Integrated circuit packaging system with patterned substrate and method of manufacture thereof
- Patent Title (中): 具有图案化衬底的集成电路封装系统及其制造方法
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Application No.: US12714291Application Date: 2010-02-26
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Publication No.: US09299648B2Publication Date: 2016-03-29
- Inventor: Il Kwon Shim , Seng Guan Chow , Heap Hoe Kuan
- Applicant: Il Kwon Shim , Seng Guan Chow , Heap Hoe Kuan
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/498 ; H01L23/31 ; H01L25/10

Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a component side and a system side; depositing a solder resist layer on the component side of the package substrate; patterning groups of access openings and a die mount opening in the solder resist layer; attaching an integrated circuit die in the die mount opening; forming conductive contacts in the access openings; and attaching system interconnects to the system side of the package substrate including controlling a coplanarity of the system interconnects by the solder resist layer.
Public/Granted literature
- US20100224974A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PATTERNED SUBSTRATE AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2010-09-09
Information query
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