Invention Grant
- Patent Title: Package with multiple plane I/O structure
- Patent Title (中): 具有多个平面I / O结构的封装
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Application No.: US14144813Application Date: 2013-12-31
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Publication No.: US09299677B2Publication Date: 2016-03-29
- Inventor: Hung-Chang Yu , Kai-Chun Lin , Yue-Der Chih
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L23/00 ; H01L23/498 ; H01L21/56 ; H01L23/31 ; H01L25/065
Abstract:
A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.
Public/Granted literature
- US20150187721A1 PACKAGE WITH MULTIPLE PLANE I/O STRUCTURE Public/Granted day:2015-07-02
Information query
IPC分类:
