A magnetoresistive random access memory (MRAM) bit cell includes a first magnetic tunnel junction (MTJ) connected to a first data line. The MRAM bit cell further includes a second MTJ connected to a second data line. The MRAM bit cell further includes a pass gate assembly connected to the first MTJ and the second MTJ, wherein the pass gate assembly comprises a plurality of transistors, and each transistor of the plurality of transistors is configured to selectively connect the first MTJ and the second MTJ to a driving line.