Invention Grant
- Patent Title: High performance system providing selective merging of dataframe segments in hardware
- Patent Title (中): 高性能系统提供硬件中数据帧段的选择性合并
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Application No.: US14020653Application Date: 2013-09-06
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Publication No.: US09304709B2Publication Date: 2016-04-05
- Inventor: Jack W. Flinsbaugh , Justin Jones , Rodney N. Mullendore , Andrew J. Tomlin
- Applicant: Western Digital Technologies, Inc. , Skyera, LLC
- Applicant Address: US CA Irvine US CA San Jose
- Assignee: Western Digital Technologies, Inc.,Skyera, LLC
- Current Assignee: Western Digital Technologies, Inc.,Skyera, LLC
- Current Assignee Address: US CA Irvine US CA San Jose
- Agency: Wilmer Cutler Pickering Hale and Dorr LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F12/02
Abstract:
A method of writing data to a range of logical blocks in a storage medium includes: receiving a command including a starting logical block address, a value indicating a range of logical block addresses to be written, and a logical block of data; storing the logical block in a first temporary storage; generating a logical page by duplicating the logical block a plurality of times corresponding to a number of logical blocks in a logical page and transporting the generated logical page to a second temporary storage and storing the generated logical page in the second temporary storage; writing the generated logical page from the second temporary storage into the storage medium beginning from the starting logical block address; and performing a read-modify-write operation if the first write operation does not begin on a logical page boundary or the last write operation does not end on a logical page boundary.
Public/Granted literature
- US20150074358A1 HIGH PERFORMANCE SYSTEM PROVIDING SELECTIVE MERGING OF DATAFRAME SEGMENTS IN HARDWARE Public/Granted day:2015-03-12
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