Invention Grant
- Patent Title: Ordering thread wavefronts instruction operations based on wavefront priority, operation counter, and ordering scheme
- Patent Title (中): 基于波前优先级，操作计数器和排序方案订购线程波前指令操作
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Application No.: US13433939Application Date: 2012-03-29
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Publication No.: US09304772B2Publication Date: 2016-04-05
- Inventor: Laurent Lefebvre , Michael Mantor
- Applicant: Laurent Lefebvre , Michael Mantor
- Applicant Address: US CA Sunnyvale CA Markham (ON)
- Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee Address: US CA Sunnyvale CA Markham (ON)
- Agency: Volpe and Koenig, P.C.
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30
Abstract:
A system and method is provided for improving efficiency, power, and bandwidth consumption in parallel processing. Rather than requiring memory polling to ensure ordered execution of processes or threads in wavefronts, the techniques disclosed herein provide a system and method to allow any process or thread in a wavefront to run out of order as long as needed, but ensure ordered execution of multiple ordered instructions when needed. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.
Public/Granted literature
- US20130262834A1 Hardware Managed Ordered Circuit Public/Granted day:2013-10-03
Information query
