Invention Grant
- Patent Title: Separable transport layer in cache coherent multiple component microelectronic systems
- Patent Title (中): 缓存相干多分量微电子系统中的可分离传输层
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Application No.: US11479922Application Date: 2006-06-30
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Publication No.: US09304964B2Publication Date: 2016-04-05
- Inventor: Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
- Applicant: Ioannis T. Schoinas , Doddaballapur Narasimha-Murthy Jayasimha
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F15/16
- IPC: G06F15/16 ; G06F15/173 ; H04L12/707 ; H04L12/703
Abstract:
A separable Transport Layer is described in the context of cache coherent multiple component micro-electronic systems. In one example, a packet is received from a source component, the packet containing a Protocol Layer. A Transport Layer is attached to the packet and the packet is sent across a component communications interface to a second component, the packet containing the Transport Layer and the Protocol Layer.
Public/Granted literature
- US20080005346A1 Separable transport layer in cache coherent multiple component microelectronic systems Public/Granted day:2008-01-03
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