Invention Grant
- Patent Title: Vertical switch three-dimensional memory array
- Patent Title (中): 垂直开关三维记忆阵列
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Application No.: US14282444Application Date: 2014-05-20
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Publication No.: US09305624B2Publication Date: 2016-04-05
- Inventor: Daniel R. Shepard
- Applicant: HGST, Inc.
- Applicant Address: US CA San Jose
- Assignee: HGST, Inc.
- Current Assignee: HGST, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Main IPC: G11C17/00
- IPC: G11C17/00 ; G11C8/10 ; G11C17/16 ; G11C17/12 ; G11C17/18 ; G11C13/00 ; H01L27/102 ; H01L27/105 ; H01L27/112 ; H01L27/24 ; H01L29/78 ; H01L29/87 ; H01L27/115 ; H01L45/00
Abstract:
A memory device includes a substrate, and, disposed thereover, an array of vertical memory switches. Each switch has at least three terminals and a cross-sectional area less than 6F2.
Public/Granted literature
- US20140321190A1 VERTICAL SWITCH THREE-DIMENSIONAL MEMORY ARRAY Public/Granted day:2014-10-30
Information query
