Invention Grant
US09305931B2 Zero cost NVM cell using high voltage devices in analog process
有权
零成本NVM单元在模拟过程中使用高压器件
- Patent Title: Zero cost NVM cell using high voltage devices in analog process
- Patent Title (中): 零成本NVM单元在模拟过程中使用高压器件
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Application No.: US13468417Application Date: 2012-05-10
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Publication No.: US09305931B2Publication Date: 2016-04-05
- Inventor: David K. Y. Liu
- Applicant: David K. Y. Liu
- Applicant Address: US NV Zephyr Cove
- Assignee: Jonker, LLC
- Current Assignee: Jonker, LLC
- Current Assignee Address: US NV Zephyr Cove
- Agency: Law Office of J. Nicholas Gross, PC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L29/778 ; H01L27/115 ; H01L29/423 ; H01L29/788
Abstract:
A non-volatile memory cell and array structure is disclosed situated within a high voltage region of an integrated circuit. The cell utilizes capacitive coupling based on an overlap between a gate and a drift region to impart a programming voltage. Programming is effectuated using a drain extension which can act to inject hot electrons. The cell can be operated as a one-time programmable (OTP) or multiple-time programmable (MTP) device. The fabrication of the cell relies on processing steps associated with high voltage devices, thus avoiding the need for additional masks, manufacturing steps, etc.
Public/Granted literature
- US20120287715A1 Zero Cost NVM Cell Using High Voltage Devices in Analog Process Public/Granted day:2012-11-15
Information query
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