Invention Grant
- Patent Title: Wafer Level optoelectronic device packages and methods for making the same
- Patent Title (中): 晶圆级光电器件封装及其制造方法
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Application No.: US14749169Application Date: 2015-06-24
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Publication No.: US09305967B1Publication Date: 2016-04-05
- Inventor: Sri Ganesh A Tharumalingam
- Applicant: Intersil Americas LLC
- Applicant Address: US CA Milpitas
- Assignee: INTERSIL AMERICAS LLC
- Current Assignee: INTERSIL AMERICAS LLC
- Current Assignee Address: US CA Milpitas
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L21/768 ; H01L25/16 ; H01L31/16 ; H01L31/18

Abstract:
Described herein are methods for fabricating a plurality of optoelectronic devices, and the optoelectronic devices resulting from such methods. One such method includes performing through silicon via (TSV) processing on a wafer, which includes a plurality of light detector sensor regions, to thereby form a plurality of vias, and then tenting and plating the vias and performing wafer back metallization. Thereafter, plurality of light source dies are attached to a top surface of the wafer, and a light transmissive material is then molded to encapsulate the light detector sensor regions and the light sensor dies therein. Additionally, opaque barriers including opaque optical crosstalk barriers are fabricated. Further, solder balls or other electrical connectors are attached to the bottom of the wafer. The wafer is eventually diced to separate the wafer into a plurality of optoelectronic devices.
Information query
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