Invention Grant
- Patent Title: Method of manufacturing semiconductor structure
- Patent Title (中): 制造半导体结构的方法
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Application No.: US14591622Application Date: 2015-01-07
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Publication No.: US09305993B2Publication Date: 2016-04-05
- Inventor: Chen-Yuan Lin , Ching-Lin Chan , Cheng-Chi Lin , Shih-Chin Lien
- Applicant: MACRONIX International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L49/02 ; G05F3/02 ; H01L27/06 ; H01L29/66

Abstract:
A method of manufacturing a semiconductor structure with a high voltage area and a low voltage area is provided. The method includes the following steps: providing a substrate of a first conductivity type; forming a second doped region of a second conductivity type in the substrate by a first implantation; forming a first doped region of a first conductivity type in the second doped region by a second implantation; forming an insulating layer on the substrate; forming a resistor on the insulating layer, wherein the resistor is electrically connecting the high voltage area and the low voltage area; and forming a conductor electrically connected to the resistor. The step of forming a first doped region defines the high voltage area and the low voltage area.
Public/Granted literature
- US20150118820A1 METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE Public/Granted day:2015-04-30
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