Invention Grant
US09306025B2 Memory transistor with multiple charge storing layers and a high work function gate electrode
有权
具有多个电荷存储层和高功函数栅电极的存储晶体管
- Patent Title: Memory transistor with multiple charge storing layers and a high work function gate electrode
- Patent Title (中): 具有多个电荷存储层和高功函数栅电极的存储晶体管
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Application No.: US14307858Application Date: 2014-06-18
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Publication No.: US09306025B2Publication Date: 2016-04-05
- Inventor: Igor Polishchuk , Sagy Charel Levy , Krishnaswamy Ramkumar
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L29/51 ; H01L21/02 ; H01L21/28 ; H01L27/115 ; H01L29/423 ; H01L29/66 ; H01L29/792 ; H01L29/49 ; G11C16/04 ; G11C16/34
Abstract:
A semiconductor device includes an oxide-nitride-oxide (ONO) dielectric stack on a surface of a substrate, and a high work function gate electrode formed over a surface of the ONO dielectric stack. The ONO dielectric stack includes a multi-layer charge storage layer including a silicon-rich, oxygen-lean top silicon nitride layer and an oxygen-rich bottom silicon nitride layer. The high work function gate electrode includes a P+ doped polysilicon layer.
Public/Granted literature
- US20150041880A1 MEMORY TRANSISTOR WITH MULTIPLE CHARGE STORING LAYERS AND A HIGH WORK FUNCTION GATE ELECTRODE Public/Granted day:2015-02-12
Information query
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