A memory module is operatively coupled to a memory controller of a host computer system and configured to operate in at least two modes including an operational mode in which the memory module performs memory operations in response to memory commands from the memory controller in accordance with an industry standard. The memory module comprises a controller circuit configured to cause the memory module to enter an initialization mode during which the memory module executes at least one initialization sequence, the initialization mode being one of the at least two modes. The memory module further comprises at least one output having a defined function in the operational mode according to the industry standard but is undefined by the industry standard in the initialization mode. During the initialization mode, the memory module is configured to output a notification signal indicating a status of the initialization mode to the memory controller via the at least one output. The memory controller is configured to execute an interrupt routine in response to the notification signal.