Invention Grant
- Patent Title: Methods of manufacturing three-dimensional semiconductor memory devices
- Patent Title (中): 制造三维半导体存储器件的方法
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Application No.: US14593221Application Date: 2015-01-09
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Publication No.: US09312270B2Publication Date: 2016-04-12
- Inventor: Kyung-Tae Jang , Myoungbum Lee , Seungmok Shin , JinGyun Kim , Yeon-Sil Sohn , Seung-Yup Lee , Dae-Hun Choi
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel & Sibley
- Priority: KR10-2010-0090186 20100914; KR10-2010-0103017 20101021
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/115 ; H01L21/28 ; H01L21/02 ; H01L21/311

Abstract:
Methods of manufacturing a three-dimensional semiconductor device are provided. The method includes: forming a thin film structure, where first and second material layers of at least 2n (n is an integer more than 2) are alternately and repeatedly stacked, on a substrate; wherein the first material layer applies a stress in a range of about 0.1×109 dyne/cm2 to about 10×109 dyne/cm2 to the substrate and the second material layer applies a stress in a range of about −0.1×109 dyne/cm2 to about −10×109 dyne/cm2 to the substrate.
Public/Granted literature
- US20150126007A1 Methods of Manufacturing Three-Dimensional Semiconductor Memory Devices Public/Granted day:2015-05-07
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