Invention Grant
US09312362B2 Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
有权
制造耐变换金属氧化物半导体场效应晶体管(MOSFET)
- Patent Title: Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
- Patent Title (中): 制造耐变换金属氧化物半导体场效应晶体管(MOSFET)
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Application No.: US14664595Application Date: 2015-03-20
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Publication No.: US09312362B2Publication Date: 2016-04-12
- Inventor: Asen Asenov , Gareth Roy
- Applicant: Gold Standard Simulations Ltd.
- Applicant Address: GB Glasgow, Scotland
- Assignee: SemiWise Limited
- Current Assignee: SemiWise Limited
- Current Assignee Address: GB Glasgow, Scotland
- Agency: Blakely Sokoloff Taylor & Zafman LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/51 ; H01L29/78 ; H01L29/10 ; H01L21/02 ; H01L21/306 ; H01L21/3105 ; H01L21/311 ; H01L21/8234 ; H01L29/36

Abstract:
Variation resistant metal-oxide-semiconductor field effect transistors (MOSFETs) are manufactured using a high-K, metal-gate ‘channel-last’ process. A cavity is formed between spacers formed over a well area having separate drain and source areas, and then a recess into the well area is formed. The active region is formed in the recess, comprising an optional narrow highly doped layer, essentially a buried epitaxial layer, over which a second un-doped or lightly doped layer is formed which is a channel epitaxial layer. The high doping beneath the low doped epitaxial layer can be achieved utilizing low-temperature epitaxial growth with single or multiple delta doping, or slab doping. A high-K dielectric stack is formed over the channel epitaxial layer, over which a metal gate is formed within the cavity boundaries. In one embodiment of the invention a cap of poly-silicon or amorphous silicon is added on top of the metal gate.
Public/Granted literature
- US20150194505A1 Manufacture of a Variation Resistant Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) Public/Granted day:2015-07-09
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