Invention Grant
- Patent Title: Package substrate
- Patent Title (中): 封装衬底
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Application No.: US13689794Application Date: 2012-11-30
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Publication No.: US09313911B2Publication Date: 2016-04-12
- Inventor: Atsuyoshi Maeda , Shingo Ito , Satoru Noda
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP2009-059522 20090312
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H05K7/02 ; H01G4/232 ; H01G4/40 ; H01L23/498 ; H01L23/50 ; H01L23/538

Abstract:
A package substrate includes a main package body including a first principal surface on which an IC is mounted, and a second principal surface, opposed to the first principal surface, on which first bonding materials for mounting are provided. An internal circuit is provided within the main package body and connected to the first bonding materials. A sub-package is arranged on the second principal surface and includes electronic components embedded therein. A thickness direction dimension being the distance from the second principal surface to a portion of the sub-package most distant from the second principal surface, is not more than a thickness direction dimension being the distance from the second principal surface to an edge of the first bonding material at the second principal surface.
Public/Granted literature
- US20130083502A1 PACKAGE SUBSTRATE Public/Granted day:2013-04-04
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